====== 6 Sequential Logic ====== "I Know What You Did Last Cycle" ===== 6.1 First Terminology ===== The most important term for the upcoming topics is the word **state**. But what is a state? \\ It is a unique situation, where the possible next steps (= possible next states), the inner behavior, or the outputs are distinguishable from other situations. Here are some practical examples: * Being happy or being sad, are two different states, since the inner behavior is different (this least often also to a different output). * Similarly, an empty memory (or hard drive) is in a different state compared to a filled one. * A traffic light showing green has an output distinguishable from red, or yellow. Sequential logic is used to describe logic circuits that show internal states ("stateful logic"), and therefore have at least one memory element (= flip-flop). The following terminology is used in the upcoming explanations: * The **input vector** $\vec{X}$ represents the $k$ inputs $X_0 ... X_{k-1}$. * The **output vector** $\vec{Y}$ represents the $l$ outputs $Y_0 ... Y_{l-1}$. * The **state vector** $\vec{Z}$ represents the $m$ inputs $Z_0 ... Z_{m-1}$. * The sign $(n)$ or $n$ marking the current point in time and therefore e.g. the current state $Z_0(n)$. * The sign $(n+1)$ or $n+1$ marking the next upcoming point in time and therefore e.g. the next state $Z_0(n+1)$. * Sequential logic circuits are also called **Finite State Machines** (FSM) or sometimes also shortened to "state machines". The shows the different terms in an abstract diagram. The "current" output values are here the values, which are shown after the delay time of the gates (about some nanoseconds). {{drawio>ViewOnSequentialLogic1.svg}} The principle interior of the black box in was already shown in one practical application in the [[:introduction_to_digital_systems:storage_elements#look_onto_the_problem_reduce_it_down_to_the_relevant_part|previous chapter]]: We saw, that we need the combination of combinatorial logic and some storage components. Additionally, both have to be connected by feeding back some of the outputs back to the combinatorial logic. The output bits $\vec{Y}$ can result either from the combinatorial logic or the flip-flops. This is shown in . {{drawio>ViewOnSequentialLogic2.svg}} {{fa>pencil?32}} depicts a state machine. * What happens, when $X$ is changed? (click onto the $0$ on the left) \\ On which edge the change is triggered? * Write down how many components each vector $\vec{X}$ and $\vec{Y}$ has. * How many bits (= flip flops) might the state vector $\vec{Z}$ need? \\ {{url>https://www.falstad.com/circuit/circuitjs.html?hideSidebar=true&ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDAChoQBhAewFcAdgBcGAJyggUk2twAyAaRkQpADRB4JUgJpVC4EPS3KJ9ACIAxADYBLAA5WetgKKWAtgB0AzmC8ov2Lxp3UQsbe0tHFw9PBC9CLwxA4IBBAQATAHEAQxEouK88L2JglR5RbNy3It8vH1FS8pyGPM94z0KYqHcvSB7umL6awYHPXqHR-tiJ8divBDYaMCoUFBpJfEkMKVWqCF5BEXFe0a6T478JzvO+q5rL+YAlSVXJGl2MPR39KSXl6CQUP8JDB5otiAZCBowDQ1os9NC1lQaGwAO4GNCvKjYSGYqCo9HLDbYjRoDSQNiyZ5rUngD7rEkSABmWUsngY1HJAA9acoyOA8ORcEjXiAVGxuWAMMsMOCwMRqQQZC9AEmE4oM2GUeCxCABeHo1LWqu52Gw22IGmwNAtkAgBpAWjYQA noborder}} One simple example of sequential logic is shown in . There, the combinatorial logic is explicitly shown. Depending on the input $X$ the output $\vec{Y}$ shows an up-counting 2-bit value counting $0 \rightarrow 1 \rightarrow 2 \rightarrow 3 \rightarrow 0 \rightarrow ...$. This is a simple state machine that will be used in the net chapters \\ {{url>https://www.falstad.com/circuit/circuitjs.html?hideSidebar=true&ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDACgwEls1xCrsCFHyqiOXEDyqZhg4TKhRxVVsLAZC4DVs3TFCcTRBo8I4xjX9Fwqgc5GT5+RafX9bGino1CRmmE0aU39dDy9aX0lCYNNsaKVPb1j4oMkhBPDUuUVsPFNIMPoBPNpg3Ayk2nLUkIqIozjgyNqCgHdXAIFeTqV2qVcFBTbjfB0x9VD22oUg6Rdh2p6aYk0ehbxpEtnJPCN14r2dvbYpleMEQLOaOF7aK5uWQJvhxzAaP1M34-bHFC3TP75E4jAEXECRFBggoAJRATA2kkgRhYYFkSPAxmQ0mgSBQOMUMAMABk4ZEeijLHoqAAzACGABsAM4MajDeECdG4Bro4Zc8DEWTdAW3PlgYV8vm8zmc3iS4FMMlWRVidrK8CoszDNUQqHAg6KMU2eUBWgPE1fW6PcDvUrW74G4WpQ23J3C1T8o1TT6OgElAr+Yjg0bOwguZ1UGjA-igy6aSGhABGkjUGpQ4vKBST-nogliKAg7oWZ3jd1WVgKaHICqM5LJf1oIAAGmxK6U5sJtihrg2AFoVyDkaPnTQIYVdiMgACa7AAHsma5BvOiwJBAsYjIyAC4AewATrSAOYMNhzhD0DAAyBqUYOIwAY23AFsEwBLAB2tJ3u5fDIAOozf1-N87xfXc7wAVxfTd-xPKpVkXUpPlXBsuxALdP2POdCHrFd6BIBc11Q7dwM3AAHEiWwHINfVMUdnA7Kd9mMf52xdBFAWo5igVbZYywjM5UWCEAe3YIA noborder}} ===== 6.2 Classical State Machine Types ===== The up-counter in the previous sub-chapter was able to count from $0$ to $3$. But what can we do to count differently, like $ 7, 6, 1, 5$? To understand this, a simpler situation will be investigated. So, let's look at how one can create an up-counter counting $1, 2, 3, 4$. ==== 6.2.1 Moore Machine ==== The first idea might be to use what we already have: an up-counter, which facilitates 2 flip-flops to result in 2-bit output. The wanted new state machine needs 3 bits for the output, since the binary representation of our outputs is $001_2$,$010_2$,$011_2$,$100_2$. A simple idea is to take the 2-bit up-counter and add a combinatorial logic in behind it. This logic shall convert the 2-bit up-counter output $00_2$ into $001_2$, the $01_2$ into $010_2$, $10_2$ into $011_2$ and $11_2$ into $101_2$. This can be logic can be created by: * writing down the truth table * putting the values into a Karnaugh map * extracting the formula with a view onto the implicants * generating the circuit with gates When this is done, the result looks like \\ {{url>https://www.falstad.com/circuit/circuitjs.html?hideSidebar=true&ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDACgwEls1xCrsCFHyqiOXEDyqZhg4TKhRxVVsLAZC4DVs3TFCcTRBo8I4xjX9Fwqgc5GT5+RafX9bGino1CRmmE0aU39dDy9aX0lCYNNsaKVPb1j4oMkhBPDUuUVsPFNIMPoBPNpg3Ayk2nLUkIqIozjgyNqCgHdXAIFeTqV2qVcFBTbjfB0x9VD22oUg6Rdh2p6aYk0ehbw54VnJPCN14r2dvbYpleMaKmXAuF7aM4uqFmuxdscwGj9Td+PX0ZQS1L-fInEamFAITSRcGhABKICYG0kkCMLDAsmR4GMyGk0CQKFxihgBgAMvDIj1UZY9FQAGYAQwANgBnBjUYYIgQY3ANDHDbngYiybqC278sAi-n8vlcrm8KUgpjkqxKl4gFXgNFmYbqqEQ24HRTimwKgK0G5PcAfW4W76lS0-Q0i1JG27OkWqAXGqZfJ1gkoFfzEEAYdIuvCml2XEGEPUoFBGEPyeO3RPGPUxzTQpQAI0kak1KAl5QKuf89EEsRQEA9CzO8cuZzWbDQ5EVRgp5P+tBAAA1m5ByFczEO0cEQAAtdgt0qbGfnS4TgrT1NxhNxUHdgCaKH75BXepwmYuW-YAA88+3IN4MWBIIFziAmQAXAD2ACc6QBzBhsc8IegYGC7zIGOyYAMYvgAttmACWAB2dKvm+MFgYyAA6TJoWhcFgTBb5gQArjBT4YWeVSrFepRfHe3bJs+iE-ueWBqJReC5Mg97Ji+BFPgADjxygUFYExqsmInUhQhgUCKWYZmmuhYrYIIQioVgIFaTbtOp7ZWCOVjDNpZiGfWtzGceCAyce+yuEIYLzMpXYKBZzhekJKgirZnqmV2LqeUM0axsmcniQFqzaIQYnaAUf5gKYWBqhgQa3oOD4QdB8GIe+KHoZh2G4fhREkUyO65ggsUakYhBVZIPBKMu6RAsG64zCAm4FAAkhQVr8s5SKHESklaY5LiefKQ2xBihljdJ6KVXq01yfycmNdqsYlCu-psEAA noborder}} This resembles a so-called **Moore Machine**. {{fa>exclamation?32}} A state machine is a **Moore Machine**when the output values $\vec{Y}$ depend only on the state values $\vec{Z}$. For this the Moore machine uses two combinatorial circuits: * The input circuit, which processes the input values $\vec{X}(n+1)$ and the state values $\vec{Z}(n)$ (of the previous step) in such a way that the new states $\vec{Z}(n+1)$ are generated. * The output circuit, which transform the state values $\vec{Z}(n)$ into the output values $\vec{Y}(n)$. The properties of a Moore machine are: * The number of flip-flops is only given by the number of states $m$. * The output only changes when an edge on the clock input happens. The Moore machine is a **synchronous state machine**. * The Moore machine usually needs fewer logic gates. But this comes with the cost of optimizing two combinatorial logic circuits. ==== 6.2.2 Mealy Machine ==== When looking at a bit more in detail, one can see, that the outputs $Y_0$ and $Y_1$ just equals the output of the first combinatorial logic circuit. This is not surprising: the input logic circuit shows the $\vec{Z}(n+1)$ and this is for the counter always the stored value plus one, except when the maximum is reached. With this information, the state machine in can be simplified by using the outputs of the input circuit for $Y_0$ and $Y_1$. This is shown in . \\ {{url>https://www.falstad.com/circuit/circuitjs.html?hideSidebar=true&ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDACgwEls1xCrsCFHyqiOXEDyqZhg4TKhRxVVsLAZC4DVs3TFCcTRBo8I4xjX9Fwqgc5GT5+RafX9bGino1CRmmE0aU39dDy9aX0lCYNNsaKVPb1j4oMkhBPDUuUVsPFNIMPoBPNpg3Ayk2nLUkIqIozjgyNqCgHdXAIFII06ldpQShSGXNuN8HQn1UPbahSDpEbYZgLMaYk1e0fnXbdyjLbxi-ck8faXadeMaKjXAuD6Lu6oWJ4fHMBo-Uw+z-vGBmLGEqjRwoBCaSJg0IAJRATEOkm6cNUiJ6xmQ0mgSBQWMUMAMABk4ZFeiwwJY9FQAGYAQwANgBnBjUUbwroNXi4X6SXhgYiyTlI1kkqwisTtMXgclmUaSyHgh5HRR8mznF60e7qn4PLWfUrgPWjFT8-Uqh6pM0os0HcAm1IAhJ8kAYdJmvAra20c6EBUoFBGF3yf0PQPGBXRUxQpQAIx5UvkJuw5QKsf89EEsRQEBRW0u-pul02bDQ5CYkrLPQGtBAAA1i5ByLdVoWq0YAFrsEulBbCbb56ttgpd0N+gNxMbBEAATRQ9fII4VOE0-aMU-YAA8eT1IN4kWBIIEriAGQAXAD2ACcaQBzBhsTcIegYSMfZCT4MAYzPAFtowBLAA7GlzwvP8P3pAAdBkIIggCPz-C8PwAVz-E8oI3KoNh3UpvgPatg1PYC703LA1GwvBcmQQ9gzPJCTwABzo5QKCsKYQEIYM2MpChznBFQrAQPUi3aQSeisJthO7VwhEjRYRNYk0ZNtVURKrM0lIUWVfWDH0Nm0LS9IhTj9PvCgwFMLB2IwYhkEbI8v1-QDgMvMDIOg2D4MQlC0IZWdYwQcypSMQgQskHglGHdIHSXHZp1GDAkWiqLgXOB0FCkVwQUGFwHU+fJUpKPLnSRIr4pK1IEocFLEnY0LPnIQhAqCIpCnYpqKLappyAKGrGq6yRnwibrWsaxsnVGjUkB68IJuuJAQqQeq6kawInWwbR-Bs6b0w2taNsIYaJUGcNCvC2VTtkEqzvOLkqkusTxVRMwMqLIA noborder}} {{fa>exclamation?32}} A state machine is a **Mealy Machine**when the output values $\vec{Y}$ depend not only on the state values $\vec{Z}$. For this the mealy machine uses two combinatorial circuits: * The input circuit, which processes the input values $\vec{X}(n+1)$ and the state values $\vec{Z}(n)$ (of the previous step) in such a way that the new states $\vec{Z}(n+1)$ are generated. * The output circuit, which transforms the state values $\vec{Z}(n)$ __and__ some inputs from ahead of the flip-flops into the output values $\vec{Y}(n)$. The properties of a mealy machine are: * The number of flip-flops is only given by the number of states $m$. * The output **not** only changes when an edge on the clock input happens: It is also dependent on the input $\vec{X}(n)$. The mealy machine is an **__asynchronous__ state machine**. * The mealy machine usually needs fewer logic gates. * The mealy machine has to be designed properly in order not to get invalid outputs. {{fa>pencil?32}} The mealy machine in can show invalid outputs. Try to find these by the correct timing of the input $X=1$ or $X=0$. * Which outputs can be created? ==== 6.2.3 Medvedev Machine ==== \\ {{url>https://www.falstad.com/circuit/circuitjs.html?hideSidebar=true&ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDACgwEls1xCrsCFHypUEHLiB5VMwwcNlQoEmiDR4peVYuxalwsWxop6upITogm2CBfqQjJzUgTEk1iK6QPj9DxTcrGwoMYmVfIM9Qq2jCTnCnJlj4-0IEch9E4LTyVMtM0zwXQLMQO2UAdzUMYTB+KV460TYq3G0a6oUOhyqaOs7aPBlultp+ptpiQhFKweHhGiHNVR65ihpVJin1ldGabZQUVX3pmjhZk4p6ljBhBHqHACUrW40+6ZZ69-A1ZBloJAoAFKGDiAAyVhQeA0ryC2GmsIMIAAZgBDAA2AGcGNRViwoWNptJCbNiWBiHJeG1wuSQBghOAKSA8OMmVQaHsDkc6QzDrsqvSFPcKLc1MKHAAjcD0VgKPBhGgYXZSvr0RUCFAQWUXLnHbYTBxoXJQmEEpgmkDbVQADTYRsmCK++oJqgAWig7ZByBsNLpjospAy3YavTyFNycNN1LQQABND32wVi6aRtRnGOx9gADwaqjAkDVkDzkFOaZAmIALgB7ABOqIA5gw2DmEPQMBpNcW3mWAMZVgC2EoAlgA7VHVmtDnsYgA6mJnM5HPaHNZ7AFchxW59naPDkGrochS9zK+OmzmsLUC8zdEeY9yq2uKwAHJ97JaKBCixQh8hJi2pooqixqsX5yho-6Hqs1I6LwP4SNwVJ6PIywgns-R+rQAaYas3w+ruCwBrhPBYW8JGXLhSyYYsYgbDqpznJc9zNPaNEDGxRzsiArrsL0AZnOyAZgRcFgUGaSxCBoxELNsTD8dsoHfh0wkoOKowqYewkCbMWmMfx5y4fpgm+no0FUkWDTsv0ZkCHoOimaM0baUwonaQ4nBUOMdH6nRMjUOInAKPgMyKAavwuBIQUdh0ig-lISgBZQ4CiuStRMql+gJRInlRsFBzBX5hhVD52jBWAvmjBlYAYLlMI1bMVX1VVbKVSl9Xmoe1XTKs2rRvlUnZclQoIkyqndb8RWMsNajBWNygeXwaiHgcUETRQg0YQy2woYV60Ldq2B7hlh3jUi4hVNG8J1UShADVUXVSLd4D1ThlUvXoHUmfyVhGT9bwKZVUbci52jcniv1yb6Fl4tsCB0VsUYjFUNy1PU4wPIDU1WPqLXI1RT1MBJBI9d+6bmtynGzP1lqIwYowHB0vVI0NlmQoexIk3IW1EgyPVMidWMWnz4EzR2UGObNjP1fBxVRp10vi-dCvXQMPW09j6t4q55wgyKdO9Bhe40KJAu4SbRuiZJFxCaKuvCXi2rMS8KUY8jomKLrfINQiZpe7CatSBZkOB99CMDGHGV4vjMI3Xdi0C7rpujIne6eyMACSbOmho5N5sTUDAudkLcrCudps0yMWqXVf1XiNcfBaHPJ43vCfahWvHDr5vdWwQA noborder}} {{fa>exclamation?32}} A state machine is a **Medvedev Machine**when the output values $\vec{Y}$ are directly given by the state values $\vec{Z}$. For this, the Medvedev machine uses only one combinatorial circuit. This circuit process the input values $\vec{X}(n+1)$ and the state values $\vec{Z}(n)$ (of the previous step) in such a way that the new states $\vec{Z}(n+1)$ and the output values $\vec{Y}(n+1)= \vec{Z}(n+1)$ are generated. The properties of a Medvedev machine are: * The number of flip-flops is given by the number of outputs $l$. * The output only changes when an edge on the clock input happens: The mealy machine is an **__synchronous__ state machine**. * The Medvedev machine usually needs more logic gates. The shows the principle differences in the architecture of the state machines. {{drawio>differencesinSM.svg}} \\ \\ {{fa>exclamation?32}} This chapter is only focussing on Moore machines. ===== 6.3 State Diagram, State Transition Diagram ===== ==== 6.3.1 Motivation ==== The diagrams of different states are well known from physics for example the state diagram (or better: phase diagram) of water, where its three states are: solid ice, liquid water, and gaseous steam. The possible state transitions are due to temperature increase or decrease. In image (1) the states of water are shown on the temperature axis. When only the state transitions are relevant, the states are simplified to a circle, showing the state name and behavior. The transitions are depicted as arrows, where the needed condition is written onto (See image (2) ). This diagram is called **state transition diagram**. {{drawio>SDwater.svg}} For matter not only the dimension "temperature" is important, but also the "pressure". The full phase diagram is shown in image (1). By this, another variable is available and more transitions. These can be drawn into the state transition diagram ( image (2)). {{drawio>SDwater2.svg}} ==== 6.3.2 Simple logic Example ==== In Germany, often one has to pay for entering the toilet. An example of such an entrance control system is shown in . In this (artificial) example, one can pay either 50ct or 1€. \\ Once paid, the turnstile will release and one can enter. Once the turnstile was pushed the entrance is closed again. {{drawio>EntranceFee.svg}} The the state transition diagram is drawn. * The two states are that (1) the turnstile is opened and one can go through and (2) the turnstile is closed and one cannot enter anymore. * The transitions are given by the done actions: one can either insert a coin or push on the turnstile. Important here are some additional considerations: * For the state transition diagram one has to **look for all possible transitions**. So, also pushing a closed turnstile or inserting more coins have to take into account. * A state transition diagram is not complete without a **legend** and without an **beginning/reset point**. The reset point is given by an arrow with "reset" written on it {{drawio>STDEntranceFee.svg}} Out of this state transition diagram, one can create a table-like representation, see . {{drawio>STDEntranceFee2.svg}} the inputs, outputs, and states have to be encoded into binary, to investigate this table a bit more. How the binary value is connected to the outputs does not matter. We will choose the following coding: * Encoding of the states: turnstile closed ≙ $Z=0$, turnstile opened ≙ $Z=1$, * Encoding of the inputs: no coin inserted ≙ $Xc=0$, coin inserted ≙ $Xc=1$, turnstile not pushed ≙ $Xp=0$, turnstile pushed ≙ $Xp=1$, * Encoding of the outputs: disallow entrance ≙ $Y=0$, allow entrance ≙ $Y=1$, This table is shown in and is called **state transition table**. {{drawio>STDRSFF.svg}} Interestingly, the logic circuit for this state transition table was already part of the course: it is the RS flip-flop! When looking deeper into the table in one can substitute $Xc$ with $S$ (as in Set) and $Xp$ with $R$ (as in Reset) to directly get the truth table of the RS flip flop. ==== 6.3.3 First Adaption for Up-Counter==== In the previous sub-chapter (6.2) we had a look at different implementations of an up counter and in this chapter the way to represent a state machine via a state transition diagram. So one question is: what do these up-counters look like in the state transition diagram? The answer is quite simple: there are 4 states, so 4 "circles" are needed. These states need to have circular connections to get the wanted increase from $00_2=0_{10}$, to $01_2=1_{10}$, to $10_2=2_{10}$, to $11_2=3_{10}$ and then back to $00_2=0_{10}$. The first state shall be $00_2=0_{10}$, so after the reset, the state machine will get entered there. Finally, the output vector is similar to the state vector. With a deeper look at it: This is therefore in particular a Medvedev machine! In both types of state machines are shown. * In the Moore machine the already seen "halving of the circle" is used to show the distinct state vector in the upper half and the output vector in the lower half. * In the Medvedev machine only one value is written in the circle, since here the state vector is also the output vector. {{drawio>STDupcounter03.svg}} {{fa>pencil?32}} The shown state transition diagram can easily be created in the tool Digital: - Click on the menu ''Analysis'' >> ''Finite State Machine'' - Here one either can add new states with a right click, or - easier - go to the menu ''Create'' >> ''Create Counter'' >> ''4 States'' - A (up) counter will get created Tasks: - Make the state machine get alive: - Click to the menu ''Create'' >> ''State Transition Table'' in order to see the state transition table - Here, click on the menu ''Create'' >> ''Circuit'' - Now, the circuit can be started via the start button. The present state in the state transition diagram will also get highlighted. The next step is to transform this into an up counter from $1...4$. For this simply the output has to be changed. This means the numbers in the "lower half of the circles" have to be adapted (see in ). {{drawio>STDupcounter14.svg}} {{fa>pencil?32}} This exercise is directly attached to exercise 6.3.3.2 The counter shall now be changed in such a way, that it counts $1 - 2 - 3 - 4$. For this: right-click on each present state beginning with state 0 and add for ''Outputs'' $Y=001$ and up-counting (see image). {{drawio>exercise6332.svg}} Tasks: - Make this state machine again get alive - Look at the circuit: Is it a Moore, Mealy, or a Medvedev machine? Looking at what we got, there is one part missing: the state machine does not have any input... So the input vectors have to be added to the transition (arrows). For an activatable counter, there only has to be one input $X$, which acts as an enable input. {{drawio>STDupcounter14enable.svg}} {{fa>pencil?32}} This exercise is directly attached to exercise 6.3.3.2 The last step is to add the transitions: right-click on all transitions and add $X=1$ as a ''Condition''. {{drawio>exercise6333.svg}} Tasks: - Make this state machine again get alive {{fa>pencil?32}} This exercise is directly attached to exercise 6.3.3.3 With the state machine in 6.3.3.3, it is also possible to create a state machine that can resemble a traffic light state machine. This shall transit from red to red-yellow, to green, to yellow, and then back to red. Use the following addition to the resulting circuit to get the light running: {{drawio>exercise6334.svg}} Tasks: - Think about the right way to change the outputs in the state machine. - Implement the needed correction and test the state machine. ====== Exercises ====== {{fa>pencil?32}} The following state transition diagram shall be given: {{drawio>STDexample1.svg}} * There are two transitions marked with $A$ and $B$. \\ What values do the inputs need to have to show all transitions explicitly? * Find the transitions wanted * Look at which state these transitions start. * Which other transitions start there? * Which transition conditions are missing? * transition A * Starts at state $000$ * Also transition with $11$, $00$ starts here * $01$, $10$ are missing * transition B * Starts at state $010$ * Also transition with $0-$ starts here * $1-$ are missing * A: $01$, $10$ * B: $1-$ * How many flip-flops are necessary for such a Moore Machine? Each flipflop can store one Bit. Each stored bit can be used to address states. So, check the number of bits $i$ of states $Z_i$ ("size of the state vector"). \\ Be aware, that one bit can address a maximum of 2 states, two bits a maximum of 4 states, three bits a maximum of 8 states, and so on. * Number of bits $i$ of states $Z_i$ is given in the legend. The number of bits $i$ has also to fit the number of states. * Here the legend shows $Z_2, Z_1, Z_0$, so there are 3 bits. * Also the number of states in the diagram is 5. This can only be numbered with at least 3 bits. 3 * Fill in the missing cells in the following state transition table: {{drawio>STTexample1.svg}} Check for each line: * What is the start/present state (given by the bits $\color{red}{Z_2(n), Z_1(n), Z_0(n)}$ in the line)? * Which transition is shown as start/present state (given by $\color{brown}{X_1, X_0}$)? Out of this orientation, the next columns can be derived: * At the end of the transition, the next state can be found (necessary for columns $\color{green}{Z_2(n+1), Z_1(n+1), Z_0(n+1)}$) * Within the state symbol of the present state, the output values can be found (necessary for columns $\color{violet}{Y_2(n), Y_1(n), Y_0(n)}$) {{drawio>STTexample1_stategy.svg}} {{drawio>STTexample1_result.svg}} {{fa>pencil?32}} Design a state machine, which results in an output of the following (decimal) numbers: $4 - 5 - 2 - 1 - 6 - 7 - 0 - 3 - 4 - ...$ * The numbers shall repeat cyclic and without any other input than the clock $CLK$ * Draw the state transition diagram and the state transition table * Use alternatively the structure of a 3bit up-counter * Draw the structure of this Moore machine with the up-counter as a black box, the input and output values, and - if necessary - further black boxes * draw and fill in the additional table. {{fa>pencil?32}} Design a state transition diagram for an automatic milling machine as a Moore machine, under the following conditions: - The milling machine has 4 states: Initialisation $I$, Component Change $C$, Running $R$, Error $E$ - The milling machine starts at the state $I$. - Once a limit switch $L$ is read as activated, the state $E$ shall be entered, independent of which state the machine was in. - Only in the state $E$ an alarm shall ring $A=1$. - $E$ can only be exited with a reset. - In order to change from Component Change $C$ to Running $R$, the user has to activate a Key $K=1$. - Only when the machine is running $R$ and the Fixed Condition is reached $F=1$, the state Component Change $C$ shall be entered. - Initialisation $I$ only changes into Component Change $C$, when no limit switch $L$ is activated and the Key is deactivated (input $K=0$) and the Fixed Condition is reached $F=1$. Explicitly draw all possible transitions. {{drawio>MillingMachine.svg}} {{fa>pencil?32}} Develop a sequential circuit, which creates the following output {{drawio>ExFindASequence.svg}} * Draw the state transition diagram of the Moore machine of the synchronous sequential circuit. * Create the digital circuit. {{fa>pencil?32}} Develop a sequential circuit, which allows driving the following LED sequence {{drawio>ExLED.svg}} * Draw the state transition diagram of the Moore machine of the synchronous sequential circuit. * Create the digital circuit. {{fa>pencil?32}} Develop a sequential circuit, which generates a clock-driven up-counter from $1..6$. The not required states shall lead after one clock cycle to the state of number $1$. * Draw the state transition diagram of the Moore machine of the synchronous sequential circuit. * Create the digital circuit.