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| - | TBD | + | < |
| - | - Semiconductor components \\ (approx. 4 blocks, based on previous lectures on [[circuit_design: | + | ====== Block 13 — Transistor Fundamentals ====== |
| - | - Bipolar transistor (structure, designations, | + | ===== Learning objectives ===== |
| - | - Transistor as a switch (circuit, switching times and behavior) | + | < |
| - | - MOSFET (structure, comparison with bipolar transistor) | + | After this 90-minute block, you can |
| - | - Optional: Transistor as an amplifier | + | |
| + | * explain why a transistor can act as a controlled electronic valve. | ||
| + | * distinguish bipolar junction transistors (BJTs) and field-effect transistors (FETs). | ||
| + | * identify the terminals of a BJT: base \(B\), collector \(C\), and emitter \(E\). | ||
| + | * distinguish npn and pnp bipolar transistors from their layer structure and circuit symbols. | ||
| + | * describe normal operation of an npn transistor using \(U_{\rm BE}\), \(U_{\rm CE}\), \(U_{\rm CB}\), \(I_{\rm B}\), \(I_{\rm C}\), and \(I_{\rm E}\). | ||
| + | * use the current-gain approximation | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C}\approx B I_{\rm B} | ||
| + | \end{align*} | ||
| + | \] | ||
| + | for simple operating-point estimates. | ||
| + | * identify the basic BJT operating regions: cutoff, active region, and saturation. | ||
| + | * explain why a saturated BJT is suitable as a closed switch, but not as a linear amplifier. | ||
| + | * identify the terminals of a MOSFET: gate \(G\), source \(S\), drain \(D\), and bulk \(B\). | ||
| + | * explain why a MOSFET is mainly voltage-controlled and why the stationary gate current is approximately zero. | ||
| + | * compare BJTs and MOSFETs as switching elements at a basic level. | ||
| + | </ | ||
| + | ===== 90-minute plan ===== | ||
| - | < | + | * **Warm-up (10 min):** |
| + | * Where do transistors occur in a robot controller? | ||
| + | * Recall from [[block11|Block 11]]: pn junctions and diode behavior. | ||
| + | * Recall from [[block12|Block 12]]: diodes are useful, but they cannot actively control a load current. | ||
| + | |||
| + | * **Core concepts (55 min):** | ||
| + | * Introductory example: transistors inside logic circuits. | ||
| + | * Transistor as controlled valve: control circuit and load circuit. | ||
| + | * BJT terminals, npn/pnp structure, and sign conventions. | ||
| + | * BJT current gain, characteristic curves, and operating regions. | ||
| + | * Switching times as a bridge to transistor applications. | ||
| + | * FET and MOSFET operating principle. | ||
| + | * MOSFET channel formation, body diode, and MOSFET types. | ||
| + | * BJT versus MOSFET as switching element. | ||
| + | |||
| + | * **Practice (20 min):** | ||
| + | * Calculate collector current from base current and current gain. | ||
| + | * Decide whether a BJT is likely in cutoff, active region, or saturation. | ||
| + | * Estimate MOSFET conduction losses with \(R_{\rm DS(on)}\). | ||
| + | * Compare BJT and MOSFET control losses. | ||
| + | |||
| + | * **Wrap-up (5 min):** | ||
| + | * Summary: BJT is current-controlled in the simple model; MOSFET is voltage-controlled in the simple model. | ||
| + | * Preview: transistor applications such as low-side switches, high-side switches, PWM, relay drivers, and H-bridges are continued in [[block14|Block 14]]. | ||
| + | |||
| + | ===== Conceptual overview ===== | ||
| + | < | ||
| + | * A transistor is a semiconductor component where a **small control signal** influences a **larger load current**. | ||
| + | * A BJT uses a base current \(I_{\rm B}\) to control | ||
| + | * A MOSFET uses a gate-source voltage \(U_{\rm GS}\) to control the drain current \(I_{\rm D}\). | ||
| + | * BJTs and MOSFETs are both used as switches and amplifiers, but their control principles are different. | ||
| + | * A transistor | ||
| + | * This block explains the component behavior. Circuit dimensioning and applications are treated in [[block14|Block 14]]. | ||
| + | </ | ||
| + | |||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||
| + | |||
| + | ===== Core content ===== | ||
| + | |||
| + | < | ||
| + | <callout type=" | ||
| + | ==== Introductory example==== | ||
| + | The electronics in personal computers, mobile phones, electric toothbrushes, | ||
| + | The complementary structure is shown by the fact that. | ||
| + | * from the digital output ($OUT2$) to ground two transistors of one kind are connected in series and | ||
| + | * from the digital output ($OUT2$) to the $5~\rm V$ supply, two transistors of a different type are connected in parallel. | ||
| + | These two different kinds of MOS-transistors and further used kinds shall be explained in this chapter. | ||
| + | |||
| + | < | ||
| + | </ | ||
| + | |||
| + | </ | ||
| + | |||
| + | ==== From diode to transistor ==== | ||
| + | |||
| + | A variable resistor can be developed from the diode. \\ | ||
| + | A diode has two terminals and one pn junction, as we have seen in [[Block11]]. It can conduct or block depending on the applied voltage. \\ Therefore, there is only one path on which the current is dependent on the voltage on this path | ||
| + | |||
| + | With this controlled transition resistor (" | ||
| + | - A transistor has at least three terminals. | ||
| + | - One terminal is used to control the current path between the other two terminals. | ||
| + | |||
| + | <panel type=" | ||
| + | Imagine a water valve. | ||
| + | |||
| + | * A small movement of the handle controls the main water flow. | ||
| + | * The handle does not supply the water energy. | ||
| + | * The pressure source supplies the water energy. | ||
| + | |||
| + | For a transistor: | ||
| + | |||
| + | * the control signal is the handle, | ||
| + | * the load current is the main water flow, | ||
| + | * the supply voltage provides the energy. | ||
| + | </panel> | ||
| + | |||
| + | < | ||
| + | A transistor is not simply “a stronger diode”. | ||
| + | It is a controlled component: one electrical variable changes the current through another path. | ||
| + | </callout> | ||
| + | |||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||
| + | |||
| + | ==== Bipolar junction transistor: structure and terminals ==== | ||
| + | |||
| + | A bipolar junction transistor (BJT) has three doped regions and three terminals. | ||
| + | |||
| + | * **Emitter \(E\):** emits charge carriers (either holes or electrons) into the transistor. | ||
| + | * **Base \(B\):** thin control region. | ||
| + | * **Collector \(C\):** collects charge carriers. | ||
| + | |||
| + | There are two basic BJT types: | ||
| + | |||
| + | * **npn transistor: | ||
| + | * **pnp transistor: | ||
| + | |||
| + | < | ||
| + | <panel type=" | ||
| + | < | ||
| + | {{: | ||
| + | </panel> | ||
| + | </WRAP> | ||
| + | |||
| + | Depending on the layer sequence | ||
| + | |||
| + | < | ||
| + | **Mnemonic for the emitter arrow** | ||
| + | |||
| + | * **npn:** arrow **n**ot **p**ointing i**n**. | ||
| + | * **pnp:** arrow **p**oints i**n**. | ||
| + | |||
| + | The arrow indicates the technical current direction at the emitter in normal operation. | ||
| + | </callout> | ||
| + | |||
| + | < | ||
| + | {{url> | ||
| + | </ | ||
| + | |||
| + | <panel type=" | ||
| + | A BJT can be drawn as two pn junctions, but it is **not** simply two independent diodes. | ||
| + | |||
| + | The base region is very thin. | ||
| + | This is essential: it allows charge carriers injected from the emitter to reach the collector. | ||
| + | </ | ||
| + | |||
| + | ==== Correct connection and normal operation of an npn transistor ==== | ||
| + | |||
| + | <panel type=" | ||
| + | Things to try: | ||
| + | |||
| + | * compare npn and pnp polarity, | ||
| + | * observe which base-emitter voltage is needed, | ||
| + | * check the current direction through the collector-emitter path. | ||
| + | |||
| + | {{url> | ||
| + | </ | ||
| + | |||
| + | For an npn transistor in normal active operation, the base-emitter junction is forward-biased and the collector-base junction is reverse-biased. | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm BE} &> 0, | ||
| + | & | ||
| + | U_{\rm CE} &> 0, | ||
| + | & | ||
| + | U_{\rm CB} &> 0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | With the reference arrows commonly used in this course: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}>0, | ||
| + | \qquad | ||
| + | I_{\rm C}>0, | ||
| + | \qquad | ||
| + | I_{\rm E}<0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Kirchhoff' | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}+I_{\rm C}+I_{\rm E}=0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Using current magnitudes: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | |I_{\rm E}|=I_{\rm B}+I_{\rm C}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | < | ||
| + | |||
| + | ^ Type ^ Voltage signs ^ Current signs with the shown reference arrows ^ | ||
| + | | npn | \(U_{\rm BE}>0\), \(U_{\rm CE}>0\), \(U_{\rm CB}>0\) | \(I_{\rm B}>0\), \(I_{\rm C}>0\), \(I_{\rm E}<0\) | | ||
| + | | pnp | \(U_{\rm BE}<0\), \(U_{\rm CE}<0\), \(U_{\rm CB}<0\) | \(I_{\rm B}<0\), \(I_{\rm C}<0\), \(I_{\rm E}>0\) | | ||
| + | </ | ||
| + | |||
| + | |||
| + | ==== How the npn transistor controls current ==== | ||
| + | |||
| + | <WRAP left> | ||
| + | <panel type=" | ||
| + | < | ||
| + | {{: | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | Here, the figures in <imgref fig_bjt_function> | ||
| + | - Figure: The physics of controlling the BJT takes place in the narrow P-layer in the middle. \\ The following | ||
| + | - Figure - Situation $U_{\rm CE}=0~{\rm V}, U_{\rm BE}=0 ~\rm V$: \\ In this picture the unpowered transistor is shown. In it the free charge carriers (electrons in green, holes in red) and the junction layers between base and emitter, and base and collector in yellow. Only the junction layer shows the stationary charge carriers with their sign. As shown in the band model, the stationary charge carriers | ||
| + | - Figure - Situation $U_{\rm CE}=0~{\rm V}, 0~{\rm V}< | ||
| + | - Figure - Situation $U_{\rm CE}=0~{\rm V}, U_{\rm BE}>0.6 \rm V$: \\ When the forward voltage of the PN junction between the base and emitter is exceeded, the injected holes and electrons cancel the bottom junction. In the simulation below, it can be seen that the circuitry of the transistor is such that in the diode circuit (which is not physically correct), the diode between the base and emitter becomes conductive. \\ \\ | ||
| + | - Figure - Situation $U_{\rm CE}> | ||
| + | - Figure - Situation $U_{\rm CE}> | ||
| + | |||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||
| + | |||
| + | <panel type=" | ||
| + | The base-emitter junction behaves approximately like a diode. | ||
| + | For a silicon transistor, noticeable base current often starts around | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm BE}\approx 0.6\ldots0.7~{\rm V}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | When enough base current flows, the thin base region allows many carriers to pass from emitter to collector. | ||
| + | Thus a small base current can control a larger collector current. | ||
| + | |||
| + | Because both electrons and holes contribute to the physical operation, the component is called **bipolar**. | ||
| + | </ | ||
| + | |||
| + | |||
| + | < | ||
| + | For the following explanations, | ||
| + | For pnp transistors, | ||
| + | </ | ||
| + | |||
| + | ==== Current gain of the BJT ==== | ||
| + | |||
| + | In the active region, a small base current controls a larger collector current. The base current flows over a diode between base and emitter (depict as arrot in the symbol). | ||
| + | |||
| + | < | ||
| + | {{elektronische_schaltungstechnik: | ||
| + | </ | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | \boxed{ | ||
| + | I_{\rm C}\approx B I_{\rm B} | ||
| + | } | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The factor \(B\) is the DC current gain: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | B=\frac{I_{\rm C}}{I_{\rm B}}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | For small changes around an operating point, the small-signal current gain is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | h_{\rm FE} = \beta | ||
| + | = | ||
| + | \frac{\Delta I_{\rm C}}{\Delta I_{\rm B}} | ||
| + | = | ||
| + | \frac{i_{\rm C}}{i_{\rm B}} | ||
| + | \approx B. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | <panel type=" | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | {\color{blue}{I_{\rm B}}} | ||
| + | &: | ||
| + | \\ | ||
| + | {\color{green}{I_{\rm C}}} | ||
| + | &: | ||
| + | \\ | ||
| + | {\color{red}{U_{\rm BE}I_{\rm B}}} | ||
| + | &: | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The useful first approximation is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | {\color{green}{I_{\rm C}}} | ||
| + | \approx | ||
| + | B\, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | |||
| + | <callout type=" | ||
| + | The current gain \(B\) is not a precise constant. | ||
| + | It depends on transistor type, temperature, | ||
| + | |||
| + | For robust switch design, one usually does **not** rely on the typical value of \(B\). | ||
| + | This is treated in [[block14|Block 14]]. | ||
| + | </ | ||
| + | |||
| + | ==== BJT characteristic curves and differential quantities ==== | ||
| + | |||
| + | A transistor is nonlinear. Therefore we describe it by characteristic curves. | ||
| + | |||
| + | Important BJT characteristics are: | ||
| + | |||
| + | * **Input characteristic: | ||
| + | * **Control characteristic: | ||
| + | * **Output characteristic: | ||
| + | |||
| + | |||
| + | < | ||
| + | </ | ||
| + | |||
| + | {{url> | ||
| + | |||
| + | Important parameters around an operating point are | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | r_{\rm BE} | ||
| + | &= | ||
| + | \frac{\Delta U_{\rm BE}}{\Delta I_{\rm B}} | ||
| + | = | ||
| + | \frac{u_{\rm BE}}{i_{\rm B}}, | ||
| + | \\[4pt] | ||
| + | r_{\rm CE} | ||
| + | &= | ||
| + | \frac{\Delta U_{\rm CE}}{\Delta I_{\rm C}} | ||
| + | = | ||
| + | \frac{u_{\rm CE}}{i_{\rm C}}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||
| + | ==== BJT operating regions ==== | ||
| + | |||
| + | A BJT operates mainly in three different regions. | ||
| + | |||
| + | < | ||
| + | |||
| + | ^ Region | ||
| + | | cutoff | ||
| + | | active region | ||
| + | | saturation | ||
| + | </ | ||
| + | \\ | ||
| + | === Switching view === | ||
| + | |||
| + | For a BJT used as a switch: | ||
| + | |||
| + | * **off:** cutoff region, | ||
| + | * **on:** saturation region. | ||
| + | |||
| + | In saturation, the collector-emitter voltage is small, often approximated by | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm CE, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The conduction loss of a saturated BJT switch is approximately | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on,BJT} | ||
| + | \approx | ||
| + | U_{\rm CE, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The control loss at the base is approximately | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm ctrl,BJT} | ||
| + | \approx | ||
| + | U_{\rm BE}I_{\rm B}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | < | ||
| + | Detailed switch dimensioning, | ||
| + | </ | ||
| + | |||
| + | === Switching times of a BJT === | ||
| + | |||
| + | Real transistor switching is not instantaneous. | ||
| + | |||
| + | {{drawio> | ||
| + | |||
| + | Typical time intervals are: | ||
| + | |||
| + | < | ||
| + | |||
| + | ^ Symbol | ||
| + | | \(t_{\rm d}\) | delay time | | ||
| + | | \(t_{\rm r}\) | rise time | | ||
| + | | \(t_{\rm on}\) | total turn-on time | | ||
| + | | \(t_{\rm s}\) | storage time | | ||
| + | | \(t_{\rm f}\) | fall time | | ||
| + | | \(t_{\rm off}\) | ||
| + | </ | ||
| + | \\ | ||
| + | During switching, both current and voltage can be significant at the same time. \\ | ||
| + | Therefore switching losses occur during turn-on and turn-off. | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | p(t)=u_{\rm CE}(t) \cdot i_{\rm C}(t). | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | <panel type=" | ||
| + | A BJT in saturation stores charge carriers in the base region. | ||
| + | When switching off, this stored charge must be removed first. | ||
| + | This contributes to the storage time \(t_{\rm s}\). | ||
| + | </panel> | ||
| + | |||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||
| + | |||
| + | ==== Field-effect transistor: basic idea ==== | ||
| + | |||
| + | A field-effect transistor controls current by an electric field. | ||
| + | |||
| + | For a MOSFET: | ||
| + | |||
| + | * **gate \(G\):** control terminal, | ||
| + | * **source \(S\):** reference terminal for \(U_{\rm GS}\), | ||
| + | * **drain \(D\):** load current terminal, | ||
| + | * **bulk \(B\):** semiconductor body, often internally connected to source in discrete MOSFETs. | ||
| + | |||
| + | The name MOSFET means: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | \text{Metal-Oxide-Semiconductor Field-Effect Transistor}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | <panel type=" | ||
| + | For a BJT: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | {\color{blue}{I_{\rm B}}} | ||
| + | \quad \text{controls} \quad | ||
| + | {\color{green}{I_{\rm C}}}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | For a MOSFET: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | {\color{blue}{U_{\rm GS}}} | ||
| + | \quad \text{controls} \quad | ||
| + | {\color{green}{I_{\rm D}}}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | In stationary operation, the ideal gate current is approximately | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm G}\approx 0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | |||
| + | < | ||
| + | <panel type=" | ||
| + | < | ||
| + | {{: | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | ==== MOSFET structure and channel formation ==== | ||
| + | |||
| + | The gate is separated from the semiconductor by a thin oxide layer. | ||
| + | Therefore the gate behaves approximately like one plate of a capacitor. | ||
| + | |||
| + | < | ||
| + | <panel type=" | ||
| + | < | ||
| + | {{: | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | For an n-channel enhancement MOSFET: | ||
| + | |||
| + | * at \(U_{\rm GS}=0\), no conductive channel exists, | ||
| + | * when \(U_{\rm GS}\) becomes large enough, electrons form a channel, | ||
| + | * then drain current \(I_{\rm D}\) can flow. | ||
| + | |||
| + | The threshold voltage \(U_{\rm GS(th)}\) indicates when a small channel just begins to form. | ||
| + | |||
| + | <WRAP column 100%> | ||
| + | <panel type=" | ||
| + | \(U_{\rm GS(th)}\) is **not** the voltage for a fully switched-on MOSFET. | ||
| + | |||
| + | For low conduction loss, use the gate voltage at which the datasheet specifies $R_{\rm DS(on)}$. | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | ==== Body diode of a MOSFET ==== | ||
| + | |||
| + | In a discrete power MOSFET, the bulk is often internally connected to the source. | ||
| + | Together with the drain region, this creates an internal pn junction. This is the **body diode**. | ||
| + | |||
| + | <callout> | ||
| + | A real MOSFET is therefore not an ideal bidirectional switch. | ||
| + | The body diode may conduct when the drain-source voltage has the reverse polarity. | ||
| + | </ | ||
| + | |||
| + | <panel type=" | ||
| + | Things to try: | ||
| + | |||
| + | * increase \(U_{\rm GS}\) and observe channel formation, | ||
| + | * reverse the drain-source polarity, | ||
| + | * observe when the body diode conducts. | ||
| + | |||
| + | {{url> | ||
| + | </ | ||
| + | |||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||
| + | ==== MOSFET output characteristics ==== | ||
| + | |||
| + | The drain current $I_{\rm D}$ depends on | ||
| + | * the drain-source voltage $U_{\rm DS}$, and | ||
| + | * the gate-source voltage $U_{\rm GS}$. | ||
| + | |||
| + | {{url> | ||
| + | |||
| + | \\ | ||
| + | |||
| + | < | ||
| + | {{elektronische_schaltungstechnik: | ||
| + | </ | ||
| + | |||
| + | A MOSFET has several operating regions. \\ | ||
| + | Their names can be confusing because they are not identical to the BJT names. | ||
| + | |||
| + | < | ||
| + | |||
| + | ^ Region | ||
| + | | cutoff | ||
| + | | linear / ohmic region | ||
| + | | MOSFET saturation region | ||
| + | </ | ||
| + | \\ | ||
| + | <callout type=" | ||
| + | The word **saturation** means different things for BJTs and MOSFETs. | ||
| + | |||
| + | * BJT saturation: good for a closed switch. | ||
| + | * MOSFET saturation: not the usual low-loss switch region. | ||
| + | |||
| + | A fully switched-on MOSFET is usually operated in the linear or ohmic region. | ||
| + | </ | ||
| + | |||
| + | When a MOSFET is fully switched on, the drain-source path behaves approximately like a small resistance: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm DS}\approx R_{\rm DS(on)} \cdot I_{\rm D}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The conduction loss is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | \boxed{ | ||
| + | P_{\rm on,MOS} | ||
| + | = | ||
| + | R_{\rm DS(on)} \cdot I_{\rm D}^2 | ||
| + | } | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | |||
| + | ==== MOSFET types ==== | ||
| + | |||
| + | MOSFETs can be classified by channel type and by whether they are normally off or normally on. | ||
| + | |||
| + | < | ||
| + | <panel type=" | ||
| + | < | ||
| + | {{: | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | < | ||
| + | |||
| + | ^ Channel type ^ Enhancement type / self-blocking | ||
| + | | n-channel | ||
| + | | p-channel | ||
| + | </ | ||
| + | \\ | ||
| + | In many mechatronic power circuits, the most common device is the **n-channel enhancement MOSFET**. | ||
| + | |||
| + | ==== BJT versus MOSFET as a switch ==== | ||
| + | |||
| + | < | ||
| + | |||
| + | ^ Property | ||
| + | | control quantity | ||
| + | | stationary control current | ||
| + | | stationary control loss | \(P_{\rm ctrl}\approx U_{\rm BE}I_{\rm B}\) | very small, but gate must be charged and discharged during switching | ||
| + | | on-state loss | \(P_{\rm on}\approx U_{\rm CE, | ||
| + | | switching behavior | ||
| + | | typical risk | current gain \(B\) varies strongly | ||
| + | </ | ||
| + | |||
| + | <callout type=" | ||
| + | MOSFET gates are sensitive. | ||
| + | A too large \(|U_{\rm GS}|\) can destroy the thin gate oxide. \\ | ||
| + | </ | ||
| + | |||
| + | <panel type=" | ||
| + | In many modern digital and power-electronic circuits, MOSFETs are preferred as switches because they need almost no stationary gate current and can have very small \(R_{\rm DS(on)}\). | ||
| + | |||
| + | However, the gate is capacitive. | ||
| + | Fast switching requires charging and discharging this capacitance quickly. | ||
| + | This is one reason why gate drivers are needed in power stages. | ||
| + | </ | ||
| + | |||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||
| + | |||
| + | ===== Exercises ===== | ||
| + | |||
| + | # | ||
| + | # | ||
| + | |||
| + | An npn transistor is operated in normal active operation. | ||
| + | The reference arrows are chosen as in the core content: | ||
| + | |||
| + | * \(I_{\rm B}\) and \(I_{\rm C}\) enter the transistor, | ||
| + | * \(I_{\rm E}\) is also defined as entering the transistor. | ||
| + | |||
| + | For normal npn operation: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm BE}>0, | ||
| + | \qquad | ||
| + | U_{\rm CE}>0, | ||
| + | \qquad | ||
| + | U_{\rm CB}>0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | 1. State the meaning of the terminals \(B\), \(C\), and \(E\). | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Use the terminal names of the bipolar junction transistor: | ||
| + | |||
| + | * \(B\): control terminal, | ||
| + | * \(C\): terminal of the main current path, | ||
| + | * \(E\): terminal where carriers are emitted. | ||
| + | |||
| + | The names are not arbitrary. They describe the physical function of the regions. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | B&: | ||
| + | C&: | ||
| + | E&: | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 2. State the signs of \(I_{\rm B}\), \(I_{\rm C}\), and \(I_{\rm E}\) in normal npn operation. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | For the reference arrows used here, base current and collector current enter the transistor. | ||
| + | |||
| + | The emitter current physically leaves the transistor. | ||
| + | Since \(I_{\rm E}\) is also defined as entering the transistor, its sign becomes negative. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}>0, | ||
| + | \qquad | ||
| + | I_{\rm C}>0, | ||
| + | \qquad | ||
| + | I_{\rm E}<0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 3. Calculate \(I_{\rm E}\) for | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}=50~\mu{\rm A}, | ||
| + | \qquad | ||
| + | I_{\rm C}=5.0~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Apply Kirchhoff' | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}+I_{\rm C}+I_{\rm E}=0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Solve for \(I_{\rm E}\): | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm E}=-(I_{\rm B}+I_{\rm C}). | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Insert both currents in the same unit: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}=50~\mu{\rm A}=0.050~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm E} | ||
| + | &= | ||
| + | -\left(0.050~{\rm mA}+5.0~{\rm mA}\right) | ||
| + | \\ | ||
| + | &= | ||
| + | -5.05~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The emitter current magnitude is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | |I_{\rm E}|=5.05~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | # | ||
| + | |||
| + | |||
| + | # | ||
| + | # | ||
| + | |||
| + | An npn transistor is operated in the active region. | ||
| + | The base current is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}=35~\mu{\rm A}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The DC current gain is approximated by | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | B=150. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | 1. Calculate the collector current \(I_{\rm C}\). | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | In the active region, use the current-gain approximation | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C}\approx B I_{\rm B}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Insert the given current gain and base current. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C} | ||
| + | & | ||
| + | B I_{\rm B} | ||
| + | \\ | ||
| + | &= | ||
| + | 150\cdot 35~\mu{\rm A} | ||
| + | \\ | ||
| + | &= | ||
| + | 5250~\mu{\rm A} | ||
| + | = | ||
| + | 5.25~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 2. Calculate the emitter current magnitude \(|I_{\rm E}|\). | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Using magnitudes, | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | |I_{\rm E}|=I_{\rm B}+I_{\rm C}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Convert \(I_{\rm B}\) to \({\rm mA}\): | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | 35~\mu{\rm A}=0.035~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | |I_{\rm E}| | ||
| + | &= | ||
| + | 0.035~{\rm mA}+5.25~{\rm mA} | ||
| + | \\ | ||
| + | &= | ||
| + | 5.285~{\rm mA} | ||
| + | \approx | ||
| + | 5.29~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 3. Explain why the value of \(I_{\rm C}\) is only an estimate. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | The formula | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C}\approx B I_{\rm B} | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | uses a simplified transistor model. | ||
| + | |||
| + | The current gain \(B\) is not an exact constant. | ||
| + | It depends on transistor type, collector current, temperature, | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | The collector current is only an estimate because \(B\) can vary strongly. | ||
| + | |||
| + | For robust circuit design, especially for switches, one should not rely only on a typical value of \(B\). | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | # | ||
| + | |||
| + | |||
| + | # | ||
| + | # | ||
| + | |||
| + | An npn transistor is used with a resistive load. | ||
| + | The supply voltage is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm dc}=12~{\rm V}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The load resistance is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | R_{\rm L}=680~\Omega. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The base current is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}=0.15~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Assume a current gain | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | B=100. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | 1. Calculate the collector current predicted by the active-region formula. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | If the transistor is in the active region, use | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | This is the collector current the transistor would try to set. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C,active} | ||
| + | & | ||
| + | 100\cdot 0.15~{\rm mA} | ||
| + | \\ | ||
| + | &= | ||
| + | 15~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 2. Calculate the maximum load current set by the resistor. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | The load circuit limits the current. | ||
| + | As a first estimate, neglect \(U_{\rm CE,sat}\) and use Ohm's law: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm L, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm L,max} | ||
| + | & | ||
| + | \frac{12~{\rm V}}{680~\Omega} | ||
| + | \\ | ||
| + | &= | ||
| + | 17.6~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 3. Decide whether the transistor is likely in the active region or in saturation. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Compare the current predicted by the active-region formula with the maximum current allowed by the load circuit: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C,active} | ||
| + | \quad \text{versus} \quad | ||
| + | I_{\rm L,max}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | If \(I_{\rm C,active}\) is smaller than the load limit, the transistor can still be in the active region. | ||
| + | If \(I_{\rm C,active}\) is larger than the load limit, the transistor is driven into saturation. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C, | ||
| + | < | ||
| + | I_{\rm L, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The transistor is not forced into saturation by this base current. | ||
| + | It is likely still in the active region. | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 4. What base current would approximately be required to reach the load-current limit in the active-region model? | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Set the active-region collector current equal to the maximum load current: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm L,max}=B I_{\rm B,limit}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Solve for the base current: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B,limit} | ||
| + | &= | ||
| + | \frac{17.6~{\rm mA}}{100} | ||
| + | \\ | ||
| + | &= | ||
| + | 0.176~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | So a base current above about | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm B}\approx 0.18~{\rm mA} | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | would begin to drive the transistor toward saturation. | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | # | ||
| + | |||
| + | |||
| + | # | ||
| + | # | ||
| + | |||
| + | An n-channel enhancement MOSFET is used as a switch. | ||
| + | The datasheet gives | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm GS(th)}=2.0\ldots4.0~{\rm V}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The datasheet also gives | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | R_{\rm DS(on)}=80~{\rm m}\Omega | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | but only for | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm GS}=10~{\rm V}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The load current is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm D}=3.0~{\rm A}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | 1. Explain why \(U_{\rm GS(th)}\) is not the correct value for switching the MOSFET fully on. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | The threshold voltage only describes the beginning of channel formation. | ||
| + | At \(U_{\rm GS(th)}\), the datasheet usually defines only a very small drain current. | ||
| + | |||
| + | For low-loss switching, the MOSFET must have a small \(R_{\rm DS(on)}\). | ||
| + | Therefore use the gate voltage for which \(R_{\rm DS(on)}\) is specified. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \(U_{\rm GS(th)}\) means: the MOSFET just starts to conduct. | ||
| + | |||
| + | It does **not** mean: the MOSFET is a good low-resistance switch. | ||
| + | |||
| + | For this datasheet value, low-loss operation is specified at | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm GS}=10~{\rm V}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 2. Calculate the drain-source voltage \(U_{\rm DS}\) when the MOSFET is fully switched on at \(U_{\rm GS}=10~{\rm V}\). | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | For a fully switched-on MOSFET, use the resistor approximation: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm DS}\approx R_{\rm DS(on)}I_{\rm D}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Convert the resistance: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | 80~{\rm m}\Omega=0.080~\Omega. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm DS} | ||
| + | & | ||
| + | 0.080~\Omega\cdot 3.0~{\rm A} | ||
| + | \\ | ||
| + | &= | ||
| + | 0.24~{\rm V}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 3. Calculate the conduction loss \(P_{\rm on, | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | The conduction loss of a switched-on MOSFET is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Alternatively, | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on,MOS} | ||
| + | &= | ||
| + | 0.080~\Omega\cdot (3.0~{\rm A})^2 | ||
| + | \\ | ||
| + | &= | ||
| + | 0.080~\Omega\cdot 9.0~{\rm A^2} | ||
| + | \\ | ||
| + | &= | ||
| + | 0.72~{\rm W}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | # | ||
| + | |||
| + | |||
| + | # | ||
| + | # | ||
| + | |||
| + | A mechatronic actuator draws the load current | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm L}=1.2~{\rm A}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Two possible switching transistors are compared. | ||
| + | |||
| + | For the BJT, assume | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm CE, | ||
| + | \qquad | ||
| + | U_{\rm BE}=0.70~{\rm V}, | ||
| + | \qquad | ||
| + | I_{\rm B}=15~{\rm mA}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | For the MOSFET, assume | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | R_{\rm DS(on)}=120~{\rm m}\Omega | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | at the available gate voltage. | ||
| + | |||
| + | 1. Calculate the BJT conduction loss. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | For a saturated BJT switch, the conduction loss is approximated by | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Here the collector current is the load current: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm C}\approx I_{\rm L}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on,BJT} | ||
| + | & | ||
| + | 0.25~{\rm V}\cdot 1.2~{\rm A} | ||
| + | \\ | ||
| + | &= | ||
| + | 0.30~{\rm W}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 2. Calculate the stationary BJT control loss at the base. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | The base-emitter path behaves approximately like a forward-biased diode. | ||
| + | |||
| + | The stationary control loss is | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm ctrl, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm ctrl,BJT} | ||
| + | & | ||
| + | 0.70~{\rm V}\cdot 15~{\rm mA} | ||
| + | \\ | ||
| + | &= | ||
| + | 10.5~{\rm mW}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 3. Calculate the MOSFET conduction loss. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | For a fully switched-on MOSFET, use | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Here the drain current is the load current: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | I_{\rm D}\approx I_{\rm L}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | Convert | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | 120~{\rm m}\Omega=0.120~\Omega. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on,MOS} | ||
| + | &= | ||
| + | 0.120~\Omega\cdot (1.2~{\rm A})^2 | ||
| + | \\ | ||
| + | &= | ||
| + | 0.120~\Omega\cdot 1.44~{\rm A^2} | ||
| + | \\ | ||
| + | &= | ||
| + | 0.173~{\rm W}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 4. Which component has the lower on-state loss in this operating point? | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Compare the calculated conduction losses: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on,BJT} | ||
| + | \quad \text{and} \quad | ||
| + | P_{\rm on,MOS}. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | The lower value means lower heat generation in the switched-on state. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | \[ | ||
| + | \begin{align*} | ||
| + | P_{\rm on, | ||
| + | < | ||
| + | P_{\rm on, | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | For this operating point, the MOSFET has the lower conduction loss. | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 5. State one important disadvantage or risk of each device. | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Use the qualitative comparison: | ||
| + | |||
| + | * BJT: controlled by base current. | ||
| + | * MOSFET: controlled by gate-source voltage. | ||
| + | * BJT switching can be affected by current gain and stored charge. | ||
| + | * MOSFET switching can be affected by gate oxide limits and gate charge. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | Possible answer: | ||
| + | |||
| + | * **BJT:** needs continuous base current; current gain \(B\) varies strongly. | ||
| + | * **MOSFET:** gate oxide is sensitive to overvoltage and ESD; the gate capacitance must be charged and discharged during switching. | ||
| + | |||
| + | Both devices must be checked for power dissipation and temperature. | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | # | ||
| + | |||
| + | |||
| + | # | ||
| + | # | ||
| + | |||
| + | A discrete n-channel MOSFET is used as a low-side switch. | ||
| + | The source is connected to ground, the drain is connected to a load, and the load is connected to \(+24~{\rm V}\). | ||
| + | |||
| + | The MOSFET is off: | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm GS}=0. | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | 1. Can the MOSFET channel conduct a useful load current? | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | For an n-channel enhancement MOSFET: | ||
| + | |||
| + | * at \(U_{\rm GS}=0\), no useful channel exists, | ||
| + | * a positive gate-source voltage is required to form the channel. | ||
| + | |||
| + | Therefore the drain-source path through the channel is off. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | No. | ||
| + | At | ||
| + | |||
| + | \[ | ||
| + | \begin{align*} | ||
| + | U_{\rm GS}=0 | ||
| + | \end{align*} | ||
| + | \] | ||
| + | |||
| + | an n-channel enhancement MOSFET is normally off, so the channel does not conduct a useful load current. | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 2. Why is a real MOSFET still not an ideal bidirectional open switch? | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | A discrete power MOSFET usually contains a body diode. | ||
| + | This diode is caused by the internal pn junction between body and drain/ | ||
| + | |||
| + | Even when the MOSFET channel is off, the body diode can conduct for one drain-source polarity. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | A real MOSFET contains a body diode. | ||
| + | |||
| + | Therefore it can block well only in one polarity. | ||
| + | In the opposite polarity, the body diode may become forward-biased and conduct. | ||
| + | |||
| + | So a single MOSFET is not an ideal bidirectional open switch. | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | 3. Why is the body diode important for motor-driver circuits? | ||
| + | |||
| + | <WRAP group> | ||
| + | <WRAP half column rightalign> | ||
| + | # | ||
| + | <WRAP leftalign> | ||
| + | Motors and coils are inductive loads. | ||
| + | Their current cannot change instantly. | ||
| + | |||
| + | When a transistor switches off, the current may continue through diodes or body diodes. | ||
| + | This influences voltage spikes, current paths, losses, and braking behavior. | ||
| + | </ | ||
| + | # | ||
| + | </ | ||
| + | |||
| + | <WRAP half column> | ||
| + | # | ||
| + | The body diode can provide a current path for inductive current. | ||
| + | |||
| + | This can be useful, but it also affects the behavior of H-bridges and motor drivers. | ||
| + | The designer must know when the body diode conducts and whether its current and power limits are sufficient. | ||
| + | # | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | # | ||
| + | |||
| + | ===== Common pitfalls ===== | ||
| + | |||
| + | * **Thinking a BJT is just two diodes:** The thin base region makes transistor action possible. Two separate diodes do not behave like a transistor. | ||
| + | * **Forgetting the base-emitter diode:** The BJT input characteristic resembles a diode. For silicon, \(U_{\rm BE}\) is often around \(0.6\ldots0.7~{\rm V}\), depending on current and temperature. | ||
| + | * **Treating \(B\) as an exact constant:** The current gain can vary strongly. Robust switching circuits are not designed with a typical \(B\) only. | ||
| + | * **Confusing active region and saturation: | ||
| + | * **Using MOSFET threshold voltage as full-on voltage:** \(U_{\rm GS(th)}\) is not sufficient for low conduction loss. | ||
| + | * **Confusing MOSFET saturation with BJT saturation: | ||
| + | * **Forgetting the MOSFET body diode:** A real power MOSFET is not an ideal bidirectional switch. | ||
| + | * **Ignoring MOSFET gate charge:** The stationary gate current is nearly zero, but fast switching still requires charging and discharging the gate capacitance. | ||
| + | * **Mixing voltage polarities for pnp and p-channel devices:** Their useful operating polarities are reversed compared with npn and n-channel devices. | ||
| + | * **Ignoring power dissipation: | ||
| + | |||
| + | ===== Embedded resources ===== | ||
| + | |||
| + | < | ||
| + | {{youtube> | ||
| + | Functional Principle of a Transistor | ||
| + | |||
| + | </WRAP> | ||
| + | ~~PAGEBREAK~~ ~~CLEARFIX~~ | ||