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introduction_to_digital_systems:realization_of_comb._logic [2021/10/18 16:26]
tfischer |
introduction_to_digital_systems:realization_of_comb._logic [2022/06/28 02:00]
tfischer |
| In <imgref pic10> the simulation shows a PLE. in the top left corner the address is shown in decimal. The logic enables only the address ''0'' up to ''8'' to have an output. The address increases and therefore step by step the information - given by the right-side array - is read. On the bottom right corner the memory of the address is shown in decimal. By clicking on the switches of the right-side, second stage one can also reprogram the stored information. | In <imgref pic10> the simulation shows a PLE. in the top left corner the address is shown in decimal. The logic enables only the address ''0'' up to ''8'' to have an output. The address increases and therefore step by step the information - given by the right-side array - is read. On the bottom right corner the memory of the address is shown in decimal. By clicking on the switches of the right-side, second stage one can also reprogram the stored information. |
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| | <wrap #SimulationPLE /> |
| <WRAP><well> | <WRAP><well> |
| <imgcaption pic10|Simulation of a PLE></imgcaption> \\ | <imgcaption pic10|Simulation of a PLE></imgcaption> \\ |
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noborder}} | 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| </well></WRAP> | </well></WRAP> |
| |
| Nowadays High Capacity Programmable Logic Devices are in use: | Nowadays High Capacity Programmable Logic Devices are in use: |
| * These are either **Complex Programmable Logic Devices** (CPLD), which have multiple sum of products or products of sum stages, with small storages in between. | * These are either **Complex Programmable Logic Devices** (CPLD), which have multiple sum of products or products of sum stages, with small storages in between. |
| * There are also **Field-Programmable Gate Arrays** (FPGA). These have a huge number (>100'000) of simple functional blocks. One functional block contains the logic gate circuit and storage elements. Between the blocks are broad binary busses. the logic circuits, storage elements and bus allocation can be changes by reconficuration. | * There are also **Field-Programmable Gate Arrays** (FPGA). These have a huge number (>100'000) of simple functional blocks. One functional block contains the logic gate circuit and storage elements. Between the blocks are broad binary busses. The logic circuits, storage elements and bus allocation can be changed by reconfiguration. In <imgref pic12> the logic gate circuit is represented by a truth table. The storage element called flipflop will be investigated in the naex chapter. |
| |
| FPGAs can be used in order to test new microcontroller and microchips. For this the FPGA is configurated in such a way, that it resembles the new chip. | FPGAs can be used in order to test new microcontroller and microchips. For this the FPGA is configurated in such a way, that it resembles the new chip. |
| </WRAP> | </WRAP> |
| |
| | <WRAP> |
| | A deeper explanation of the FPGA can be found here: |
| | {{youtube>lLg1AgA2Xoo}} |
| | </WRAP> |
| |
| ~~PAGEBREAK~~ ~~CLEARFIX~~ | ~~PAGEBREAK~~ ~~CLEARFIX~~ |