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introduction_to_digital_systems:realization_of_comb._logic [2022/06/28 01:55] tfischer |
introduction_to_digital_systems:realization_of_comb._logic [2023/09/19 23:48] mexleadmin |
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- | ====== 4. Realization of Combinatorical | + | ====== 4 Realization of Combinatorial |
===== 4.1 Preparation ===== | ===== 4.1 Preparation ===== | ||
- | In the last chapter we investigated the Therm-o-Safety example. From this, it was possible to create the logic formula via sum of products of products | + | In the last chapter, we investigated the Therm-o-Safety example. From this, it was possible to create the logic formula via sum-of-products of product-of-sums (see <imgref pic01> |
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</ | </ | ||
- | It is simple to derive the gate logic from the formula (<imgref pic02>). For each of the three (min)terms an AND-gate combines the needed inputs. As shown in the image, | + | It is simple to derive the gate logic from the formula (<imgref pic02> |
+ | For each of the three (min)terms, an AND-gate combines the needed inputs. | ||
+ | As shown in the image, the inverted inputs are usually | ||
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==== 4.1.1 History of the Logic Families ==== | ==== 4.1.1 History of the Logic Families ==== | ||
- | A huge variety of integrated circuits (ICs) were used historically. <imgref pic03> shows two separate integrated circuits: There can be single or multiple gates in an IC with two or more inputs. The most used IC series was the 74xx ICs, where the xx are numbers | + | A huge variety of integrated circuits (ICs) were used historically. <imgref pic03> shows two separate integrated circuits: |
+ | There can be single or multiple gates in an IC with two or more inputs. The most used IC series was the 74xx ICs, where the xx are numbers | ||
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</ | </ | ||
- | The logic families which were first developed were based on bipolar transistors. To use these as an closed switch a constant current is needed. This result | + | The logic families which were first developed were based on bipolar transistors. To use these as a closed switch a constant current is needed. This results |
- | Depending on the combination of these transistors | + | Depending on the combination of these transistors |
The name TTL survived as a designation for the needed voltage levels $0V$ and $5V$. The $5V$ can still be found as supply voltage in some logic circuits. | The name TTL survived as a designation for the needed voltage levels $0V$ and $5V$. The $5V$ can still be found as supply voltage in some logic circuits. | ||
- | Modern controller | + | Modern controller logic is based on CMOS. <imgref pic04> shows that this type of logic only dissipates |
- | The 74xx series is nowadays mostly from historical interest. Nearly all of the applications can now be done directly with microcontrollers. In rare cases they are still used as "glue logic" between two logic ICs, e.g. as for adjusting the logic voltage level. | + | The 74xx series is nowadays mostly from historical interest. Nearly all of the applications can now be done directly with microcontrollers. In rare cases, they are still used as "glue logic" between two logic ICs, e.g. for adjusting the logic voltage level. |
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==== 4.1.2 Logic Stages==== | ==== 4.1.2 Logic Stages==== | ||
- | From the <img pic02> we know how the logic for the sum of products looks like. in <imgref pic05> also the gate logic for the product of sums is shown. | + | From the <imgref |
Both consist of two logic stages: | Both consist of two logic stages: | ||
- | * For sum of products the first logic stage are the OR-gates, the second stage is the AND-gate, | + | * For sum-of-products the first logic stage is set up with |
- | * For product of sums, it is just the other way around: first logic stage AND-gates, second stage OR-gate. | + | * For product-of-sums, it is just the other way around: first logic stage AND-gates, second stage OR-gate. |
- | Generally, the two-stage setup allows | + | Generally, the two-stage setup allows |
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</ | </ | ||
- | Often a simplification of the circuit | + | Often a simplification of the circuit |
- | Only the inputs | + | Only the inputs where the crossing of the lines is marked with a black dot are used as input for the stages. |
+ | These connections are fixed. Often also programmable connections are used, which are usually set during production. | ||
The logic stages can be seen in <imgref pic06> | The logic stages can be seen in <imgref pic06> | ||
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- | When there are programmable connections, | + | When there are programmable connections, |
- | - Programmable Array Logic (PAL): first stage is programmable, | + | - Programmable Array Logic (PAL): |
- | - Programmable Logic Element (PLE): first stage is fixed, second stage is programmable | + | - Programmable Logic Element (PLE): |
- | - Programmable Logic Array (PLA): both stages are programmable | + | - Programmable Logic Array (PLA): |
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PLEs have fixed AND array logic in stage 1. This is often used in memory chips. \\ | PLEs have fixed AND array logic in stage 1. This is often used in memory chips. \\ | ||
- | The AND array logic for memory chips represents a list of increasing digital values (see left stage in <imgref pic08>). | + | The AND array logic for memory chips represents a list of increasing digital values (see the left stage in <imgref pic08>). |
- | In the picture the first 6 rpime numbers are stored in a 4-bit addressed 4-bit memory. | + | In the picture, the first 6 prime numbers are stored in a 4-bit addressed 4-bit memory. |
The input value '' | The input value '' | ||
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</ | </ | ||
- | In <imgref pic10> the simulation shows a PLE. in the top left corner the address is shown in decimal. The logic enables only the address '' | + | In <imgref pic10> the simulation shows a PLE. In the top left corner, the address is shown in decimal. The logic enables only the address '' |
- | <WRAP #Simulation_PLE | + | <wrap #SimulationPLE |
< | < | ||
< | < | ||
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</ | </ | ||
- | There are different types of memory available. The <imgref pic09> shows an overview separated by the different | + | There are different types of memory available. The <imgref pic09> shows an overview separated by the different |
- | A good practical example for an application | + | A good practical example for an application |
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===== 4.2.2 Programmable Logic Arrays and Programmable Logic Elements ===== | ===== 4.2.2 Programmable Logic Arrays and Programmable Logic Elements ===== | ||
- | PLA were often used as glue logic, but are nowaday | + | PLA was often used as glue logic but is nowadays |
- | Based on PLAs - and in in special | + | Based on PLAs - and especially |
< | < | ||
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Nowadays High Capacity Programmable Logic Devices are in use: | Nowadays High Capacity Programmable Logic Devices are in use: | ||
- | * These are either **Complex Programmable Logic Devices** (CPLD), which have multiple sum of products or products of sum stages, with small storages in between. | + | * These are either **Complex Programmable Logic Devices** (CPLD), which have multiple sum-of-products or products-of-sum stages, with small storages in between. |
- | * There are also **Field-Programmable Gate Arrays** (FPGA). These have a huge number (> | + | * There are also **Field-Programmable Gate Arrays** (FPGA). These have a huge number (> |
- | FPGAs can be used in order to test new microcontroller | + | FPGAs can be used to test new microcontrollers |
<WRAP center> | <WRAP center> |