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--- electrical_engineering_and_electronics_1:block04 [2025/10/14 11:36] – [Parallel circuit of resistors] mexleadmin
+++ electrical_engineering_and_electronics_1:block04 [2026/01/10 13:24] (aktuell) – mexleadmin
@@ Zeile 1: / Zeile 1: @@
 ====== Block 04 — Kirchhoff’s laws ======
-===== Learning objectives =====
+===== 4.0 Intro =====
+==== 4.0.1 Learning Objectives ====
 <callout>
 After this 90-minute block, you can
@@ Zeile 10: / Zeile 12: @@
 </callout>
-===== Preparation at Home =====
+==== 4.0.2 Preparation at Home ====
 As always:
@@ Zeile 20: / Zeile 22: @@
   * 2.4.3
-===== 90-minute plan =====
+==== 4.0.3 90-minute Plan ====
   - Warm-up (10 min): What is a “node”? what is a “mesh”? quick sketch-and-label drill.
   - Core concepts (40 min): reference arrows & sign conventions → KCL at a node → KVL in a loop → dimensional check.
@@ Zeile 28: / Zeile 30: @@
 ~~PAGEBREAK~~ ~~CLEARFIX~~
-===== Core Content  =====
+===== 4.1 Core Content  =====
-==== Nodes, Branches, and Loops ====
+==== 4.1.1 Nodes, Branches, and Loops ====
 Electrical circuits typically have the structure of networks. Networks consist of two elementary structural elements:
@@ Zeile 69: / Zeile 71: @@
 ~~PAGEBREAK~~ ~~CLEARFIX~~
-==== Reshaping Circuits ====
+==== 4.1.2 Reshaping Circuits ====
 With the knowledge of nodes, branches, and meshes, circuits can be simplified.
@@ Zeile 86: / Zeile 88: @@
 ~~PAGEBREAK~~ ~~CLEARFIX~~
-==== Kirchhoff’s Current Law (KCL) ====
+==== 4.1.3 Kirchhoff’s Current Law (KCL) ====
 <WRAP right>
@@ Zeile 117: / Zeile 119: @@
 ~~PAGEBREAK~~ ~~CLEARFIX~~
-==== Parallel circuit of resistors ====
+==== 4.1.4 Parallel circuit of resistors ====
 From Kirchhoff's current law, the total resistance for resistors connected in parallel can be derived (<imgref BildNr11>):
@@ Zeile 144: / Zeile 146: @@
-==== Current divider ====
+==== 4.1.5 Current divider ====
 The current divider rule shows in which way an incoming current on a node will be divided into two outgoing branches.
@@ Zeile 160: / Zeile 162: @@
 ~~PAGEBREAK~~ ~~CLEARFIX~~
-==== Kirchhoff’s Voltage Law (KVL) ====
+==== 4.1.6 Kirchhoff’s Voltage Law (KVL) ====
 Around any closed loop, the algebraic sum of voltages is zero:
@@ Zeile 215: / Zeile 217: @@
 __In general__: The equivalent resistance of a series circuit is always greater than the greatest resistance.
-===== From laws to tools (preview) =====
+==== 4.1.7 From laws to tools (preview) ====
 KCL and KVL immediately yield:
@@ Zeile 226: / Zeile 228: @@
 ~~PAGEBREAK~~ ~~CLEARFIX~~
-===== Common pitfalls =====
+===== 4.2 Common pitfalls =====
   * **Mixed conventions**: do not swap passive/active mid-solution. Fix reference arrows once, then stick to them.
   * **Sign slips**: in KVL, mark loop direction on the drawing; in KCL, decide “in is $+$” (or “out is $+$”) and keep it for *all* terms.
@@ Zeile 232: / Zeile 234: @@
 ~~PAGEBREAK~~ ~~CLEARFIX~~
-===== Exercises =====
+===== 4.3 Exercises =====
 <panel type="info" title="Exercise 2.3.1 Branches and Nodes"> <WRAP group><WRAP column 2%>{{fa>pencil?32}}</WRAP><WRAP column 92%>