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electrical_engineering_and_electronics_1:block04 [2025/09/28 22:38] – angelegt mexleadminelectrical_engineering_and_electronics_1:block04 [2026/01/10 13:24] (aktuell) – mexleadmin
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 ====== Block 04 — Kirchhoff’s laws ====== ====== Block 04 — Kirchhoff’s laws ======
  
-===== Learning objectives =====+===== 4.0 Intro ===== 
 + 
 +==== 4.0.1 Learning Objectives ====
 <callout> <callout>
 +After this 90-minute block, you can
   * Identify nodes, branches, and (essential) loops in DC circuits and draw consistent reference arrows for $U$ and $I$ (passive/active sign conventions).   * Identify nodes, branches, and (essential) loops in DC circuits and draw consistent reference arrows for $U$ and $I$ (passive/active sign conventions).
   * State and apply **Kirchhoff’s Current Law (KCL)** at an arbitrary node and **Kirchhoff’s Voltage Law (KVL)** around a loop.    * State and apply **Kirchhoff’s Current Law (KCL)** at an arbitrary node and **Kirchhoff’s Voltage Law (KVL)** around a loop. 
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 </callout> </callout>
  
-===== 90-minute plan =====+==== 4.0.2 Preparation at Home ==== 
 + 
 +As always:  
 +  * Please read through the following chapter. 
 +  * Also here, there are some clips for more clarification under 'Embedded resources' (check the text above/below, sometimes only part of the clip is interesting).  
 + 
 +For checking your understanding please do the following exercises: 
 +  * 2.3.3 (1)  
 +  * 2.4.3 
 + 
 +==== 4.0.3 90-minute Plan ====
   - Warm-up (10 min): What is a “node”? what is a “mesh”? quick sketch-and-label drill.   - Warm-up (10 min): What is a “node”? what is a “mesh”? quick sketch-and-label drill.
   - Core concepts (40 min): reference arrows & sign conventions → KCL at a node → KVL in a loop → dimensional check.   - Core concepts (40 min): reference arrows & sign conventions → KCL at a node → KVL in a loop → dimensional check.
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
-===== Core Content  =====+===== 4.1 Core Content  =====
  
-==== Nodes, Branches, and Loops ====+==== 4.1.1 Nodes, Branches, and Loops ====
  
 Electrical circuits typically have the structure of networks. Networks consist of two elementary structural elements: Electrical circuits typically have the structure of networks. Networks consist of two elementary structural elements:
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
  
-==== Reshaping Circuits ====+==== 4.1.2 Reshaping Circuits ====
  
 With the knowledge of nodes, branches, and meshes, circuits can be simplified. With the knowledge of nodes, branches, and meshes, circuits can be simplified.
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
  
-==== Kirchhoff’s Current Law (KCL) ====+==== 4.1.3 Kirchhoff’s Current Law (KCL) ====
  
 <WRAP right> <WRAP right>
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
-==== Parallel circuit of resistors ====+==== 4.1.4 Parallel circuit of resistors ====
  
 From Kirchhoff's current law, the total resistance for resistors connected in parallel can be derived (<imgref BildNr11>): From Kirchhoff's current law, the total resistance for resistors connected in parallel can be derived (<imgref BildNr11>):
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 </WRAP> </WRAP>
  
-Since the same voltage $U_{ab}$ is dropped across all resistors, using Kirchhoff's current law:+Since the same voltage $U_{\rm ab}$ is dropped across all resistors, using Kirchhoff's current law:
  
-$\large{{U_{ab}}\over{R_1}}+ {{U_{ab}}\over{R_2}}+ ... + {{U_{\rm ab}}\over{R_n}}= {{U_{\rm ab}}\over{R_{\rm eq}}}$+$\large{{U_{\rm ab}}\over{R_1}}+ {{U_{\rm ab}}\over{R_2}}+ ... + {{U_{\rm ab}}\over{R_n}}= {{U_{\rm ab}}\over{R_{\rm eq}}}$
  
 $\rightarrow \large{{{1}\over{R_1}}+ {{1}\over{R_2}}+ ... + {{1}\over{R_n}}= {{1}\over{R_{\rm eq}}} = \sum_{x=1}^{n} {{1}\over{R_x}}}$ $\rightarrow \large{{{1}\over{R_1}}+ {{1}\over{R_2}}+ ... + {{1}\over{R_n}}= {{1}\over{R_{\rm eq}}} = \sum_{x=1}^{n} {{1}\over{R_x}}}$
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-==== Current divider ====+==== 4.1.5 Current divider ====
  
 The current divider rule shows in which way an incoming current on a node will be divided into two outgoing branches. The current divider rule shows in which way an incoming current on a node will be divided into two outgoing branches.
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
-==== Kirchhoff’s Voltage Law (KVL) ====+==== 4.1.6 Kirchhoff’s Voltage Law (KVL) ====
  
 Around any closed loop, the algebraic sum of voltages is zero: Around any closed loop, the algebraic sum of voltages is zero:
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 __In general__: The equivalent resistance of a series circuit is always greater than the greatest resistance. __In general__: The equivalent resistance of a series circuit is always greater than the greatest resistance.
  
-===== From laws to tools (preview) =====+==== 4.1.7 From laws to tools (preview) ====
  
 KCL and KVL immediately yield: KCL and KVL immediately yield:
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
  
-===== Common pitfalls =====+===== 4.2 Common pitfalls =====
   * **Mixed conventions**: do not swap passive/active mid-solution. Fix reference arrows once, then stick to them.   * **Mixed conventions**: do not swap passive/active mid-solution. Fix reference arrows once, then stick to them.
   * **Sign slips**: in KVL, mark loop direction on the drawing; in KCL, decide “in is $+$” (or “out is $+$”) and keep it for *all* terms.   * **Sign slips**: in KVL, mark loop direction on the drawing; in KCL, decide “in is $+$” (or “out is $+$”) and keep it for *all* terms.
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 ~~PAGEBREAK~~ ~~CLEARFIX~~ ~~PAGEBREAK~~ ~~CLEARFIX~~
-===== Exercises =====+===== 4.3 Exercises =====
  
 <panel type="info" title="Exercise 2.3.1 Branches and Nodes"> <WRAP group><WRAP column 2%>{{fa>pencil?32}}</WRAP><WRAP column 92%> <panel type="info" title="Exercise 2.3.1 Branches and Nodes"> <WRAP group><WRAP column 2%>{{fa>pencil?32}}</WRAP><WRAP column 92%>
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 </WRAP></WRAP></panel> </WRAP></WRAP></panel>
  
-<panel type="info" title="Exercise 4.1 Identify nodes, branches, and loops"> <WRAP group><WRAP column 2%>{{fa>pencil?32}}</WRAP><WRAP column 92%> + 
-Label nodes (degree $\ge 3$), branches, and at least two distinct loops.   + 
-<WRAP> +
-<imgcaption BildNr70 | Branches and Nodes> +
-</imgcaption> +
-{{drawio>ZweigeundKnoten.svg}} +
-</WRAP> +
-</WRAP></WRAP></panel> +